About me

Hi, this is Yu-Sheng Lin from Taiwan, and welcome to my personal page. I am a VLSI hardware architecturer/engineer, and my professional skill is about parallel processors like GPGPUs. I am also familiar with several software technieques or languages like CUDA, modern C++ and Python.

Projects

  • UMI (GPL)
    • Write memory-optimized CUDA code easily.
    • Also refer to the paper listed below.
  • MIMORI (GPL)
    • A memory-efficient and easy-to-use hardware architecture for deep learning and general scientific computations.
    • Papre under reviewing.
  • Nicotb (GPL)
    • Simulate RTL code with Python easily.
    • Documents

Publications

Highlighted

  • Yu-Sheng Lin, Wei-Chao Chen, and Shao-Yi Chien, “Unrolled Memory Inner-products: an abstract GPU operator for efficient vision-related computations,” in International Conference on Computer Vision (ICCV), Oct. 2017 (Spotlight poster paper)

The others

  • Shih-Yi Wu, Yu-Sheng Lin, Wei-Chih Tu and Shao-Yi Chien, “Hardware-Efficient Two-Stage Saliency Detection,” in IEEE International Workshop on Signal Processing Systems (SiPS), Oct. 2018
  • Chih-Ting Liu, Yi-Heng Wu, Yu-Sheng Lin, and Shao-Yi Chien, “Computation-Performance Optimization of Convolutional Neural Networks with Redundant Kernel Removal,” in 2018 International Symposium on Circuits and Systems (ISCAS), May. 2018
  • Hung-Yu Tseng, Po-Chen Wu, Yu-Sheng Lin, and Shao-Yi Chien, “D-PET: A direct 6 DoF pose estimation and tracking system on graphics processing units,” in 2017 International Symposium on Circuits and Systems (ISCAS), May. 2017
  • Chi-Wen Cheng, Yu-Sheng Lin, Shao-Yi Chien, “Efficient reconfigurable architecture for MIMD streaming execution using permutation network,” in SiPS 2014: 221-225, Oct. 2014
  • Wei-Kai Chan, Yu-Hsiang Tseng, Yu-Sheng Lin, Shao-Yi Chien, “Coarse-grained reconfigurable stream processor for distributed smart cameras,” in SiPS 2014: 262-267, Oct. 2014
  • Yu-Jung Chen, Yu-Sheng Lin, Hsin-Fang Wu, Chia-Ming Chang, Shao-Yi Chien, “HD video decoding scheme based on mobile heterogeneous system architecture,” in Proc. International Conference on Acoustics, Speech, and Signal Processing (ICASSP2013), Vancouver, Canada, May. 2013

Experience

Intership

  • MultiTeK (2016 summer)
    • Deep learning architecture survey and design.
  • A part-time Job with my friends (2012 summer)
    • Website building with Flask.
  • MediaTeK (2011 summer)
    • Accelerating SIFT with OpenCL.

Education

  • PhD. candidate at Graduate Institution of Electronic Engineering, National Taiwan University (GIEE, NTU).
  • Bachelor at Department of Electrical Engineering, National Taiwan University (Dep. of EE, NTU).
    • Ranking 8 out of about 240 peers.

TA

  • Graduate courses
    • DSP in VLSI design
    • Multimedia SoC
    • 3D multimedia project
    • General purposed GPU programming
  • Undergraduate courses
    • Digital circuit lab
    • Linear algebra

Tutorial

TODO